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1 for more information www.linear.com/lt8302 typical a pplica t ion fea t ures descrip t ion 42v in micropower no-opto isolated flyback converter with 65v/3.6a switch the lt ? 8302 is a monolithic micropower isolated flyback converter. by sampling the isolated output voltage directly from the primary-side flyback waveform, the part requires no third winding or opto-isolator for regulation. the output voltage is programmed with two external resistors and a third optional temperature compensation resistor. bound - ary mode operation provides a small magnetic solution with excellent load regulation. low ripple burst mode operation maintains high efficiency at light load while minimizing the output voltage ripple. a 3.6a, 65 v dmos power switch is integrated along with all the high voltage circuitry and control logic into a thermally enhanced 8- lead so package. the lt8302 operates from an input voltage range of 2.8 v to 42 v and delivers up to 18 w of isolated output power. the high level of integration and the use of boundary and low ripple burst modes result in a simple to use, low component count, and high efficiency application solution for isolated power delivery. 2.8v to 32v in /5v out isolated flyback converter a pplica t ions n 2.8v to 42v input voltage range n 3.6a, 65v internal dmos power switch n low quiescent current: 106a in sleep mode 380 a in active mode n quasi-resonant boundary mode operation at heav y load n low ripple burst mode ? operation at light load n minimum load < 0.5% ( typ ) of full output n no transformer third winding or opto-isolator required for output v oltage regulation n accurate en/uvlo threshold and hysteresis n internal compensation and soft-start n temperature compensation for output diode n output short-circuit protection n thermally enhanced 8-lead so package n isolated automotive, industrial, medical power supplies n isolated auxiliary/housekeeping power supplies l, lt , lt c , lt m , linear technology, the linear logo and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 5438499, 7463497, 7471522. efficiency vs load current v in lt8302 sw 9h v in 2.8v to 32v 3:1 1h r fb r ref en/uvlo 470pf 10f 1f 220f 10ma to 1.1a (v in = 5v) 10ma to 2.0a (v in = 12v) 10ma to 2.9a (v in = 24v) v out ? 39 154k ? ? 115k 10k 8302 ta01a gnd intv cc tc v out + 5v load current (a) 0 efficiency (%) 80 85 90 1.5 2.5 8302 ta01b 75 70 0.5 1.0 2.0 3.0 65 60 v in = 5v v in = 12v v in = 24v front page application lt 8302 8302fa
2 for more information www.linear.com/lt8302 p in c on f igura t ion a bsolu t e maxi m u m r a t ings sw ( note 2) .............................................................. 65 v v in ............................................................................ 42 v en / uv lo .................................................................... v in r fb ........................................................ v in C 0.5v to v in current into r fb .................................................... 200 a intv cc , r ref , tc ......................................................... 4v op erating junction temperature range ( notes 3, 4) lt 830 2 e, lt 8302 i.............................. C40 c to 125 c lt 830 2 h ............................................ C4 0 c to 150 c lt 830 2 mp ......................................... C 55 c to 150 c storage temperature range .................. C 65 c to 150 c lead temperature ( soldering , 10 sec ) ................... 30 0 c (note 1) 1 2 3 4 8 7 6 5 top view tc r ref r fb sw en/uvlo intv cc v in gnd s8e package 8-lead plastic so 9 gnd ja = 33c/w exposed pad ( pin 9) is gnd, must be soldered to pcb o r d er i n f or m a t ion lead free finish tape and reel part marking package description temperature range lt8302es8e#pbf lt8302es8e#trpbf 8302 8-lead plastic so C40c to 125c lt8302is8e#pbf lt8302is8e#trpbf 8302 8-lead plastic so C40c to 125c lt8302hs8e#pbf lt8302hs8e#trpbf 8302 8-lead plastic so C40c to 150c lt8302mps8e#pbf lt8302mps8e#trpbf 8302 8-lead plastic so C55c to 150c consult lt c marketing for parts specified with wider operating temperature ranges. consult lt c marketing for information on nonstandard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ lt 8302 8302fa
3 for more information www.linear.com/lt8302 e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 5v, v en/uvlo = v in , c intvcc = 1f to gnd, unless otherwise noted. symbol parameter conditions min typ max unit v in v in voltage range l 2.8 42 v i q v in quiescent current v en/uvlo = 0.3v v en/uvlo = 1.1v sleep mode (switch off) active mode (switch on) 0.5 53 106 380 2 a a a a en/uvlo shutdown threshold for lowest off i q l 0.3 0.75 v en/uvlo enable threshold falling l 1.178 1.214 1.250 v en/uvlo enable hysteresis 14 mv i hys en/uvlo hysteresis current v en/uvlo = 0.3v v en/uvlo = 1.1v v en/uvlo = 1.3v C0.1 2.3 C0.1 0 2.5 0 0.1 2.7 0.1 a a a v intvcc intv cc regulation voltage i intvcc = 0ma to 10ma 2.85 3 3.1 v i intvcc intv cc current limit v intvcc = 2.8v 10 13 16 ma intv cc uvlo threshold falling 2.39 2.47 2.55 v intv cc uvlo hysteresis 105 mv (r fb C v in ) voltage i rfb = 75a to 125a C50 50 mv r ref regulation voltage l 0.98 1.00 1.02 v r ref regulation voltage line regulation 2.8v v in 42v C0.01 0 0.01 %/v v tc tc pin voltage 1.00 v i tc tc pin current v tc = 1.2v v tc = 0.8v 12 15 C200 18 a a f min minimum switching frequency 11.3 12 12.7 khz t on(min) minimum switch-on time 160 ns t off(max) maximum switch-off time backup timer 170 s i sw(max) maximum switch current limit 3.6 4.5 5.4 a i sw(min) minimum switch current limit 0.78 0.87 0.96 a r ds(on) switch on-resistance i sw = 1.5a 80 m i lkg switch leakage current v sw = 65v 0.1 0.5 a t ss soft-start timer 11 ms note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the sw pin is rated to 65v for transients. depending on the leakage inductance voltage spike, operating waveforms of the sw pin should be derated to keep the flyback voltage spike below 65v as shown in figure 5. note 3: the lt8302e is guaranteed to meet performance specifications from 0c to 125c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the lt8302i is guaranteed over the full C40c to 125c operating junction temperature range. the lt8302h is guaranteed over the full C40c to 150c operating junction temperature range. the lt8302mp is guaranteed over the full C55c to 150c operating junction temperature range. high junction temperatures degrade operating lifetimes. operating lifetime is derated at junction temperature greater than 125c. note 4: the lt8302 includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 150c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may impair device reliability. lt 8302 8302fa
4 for more information www.linear.com/lt8302 typical p er f or m ance c harac t eris t ics boundary mode waveforms discontinuous mode waveforms burst mode waveforms v in shutdown current v in quiescent current, sleep mode v in quiescent current, active mode output load and line regulation output temperature variation switching frequency vs load current t a = 25c, unless otherwise noted. temperature (c) ?50 output voltage (v) 5.1 5.2 5.3 25 75 8302 g02 5.0 4.9 ?25 0 50 100 150125 4.8 4.7 front page application v in = 12v i out = 1a r tc = 115k r tc = open v sw 20v/div v out 50mv/div 2s/div front page application v in = 12v i out = 2a 8302 g04 v sw 20v/div v out 50mv/div 2s/div front page application v in = 12v i out = 0.5a 8302 g05 v sw 20v/div v out 50mv/div 20s/div front page application v in = 12v i out = 10ma 8302 g06 v in (v) 0 i q (a) 6 8 10 40 8302 g07 4 2 0 10 20 30 50 t j = 150c t j = 25c t j = ?55c v in (v) 0 80 i q (a) 90 100 110 120 130 140 10 20 30 40 8302 g08 50 t j = 150c t j = ?55c t j = 25c v in (v) 0 i q (a) 380 400 420 40 8302 g09 360 340 320 10 20 30 50 t j = 150c t j = ?55c t j = 25c load current (a) 0 0.5 0 frequency (khz) 200 500 1.0 2.0 2.5 8302 g03 100 400 300 1.5 3.0 v in = 5v v in = 12v v in = 24v front page application load current (a) 0 output voltage (v) 5.15 1.5 8302 g01 5.00 4.90 0.5 1.0 2.0 4.85 4.80 5.20 5.10 5.05 4.95 2.5 3.0 v in = 5v v in = 12v v in = 24v lt 8302 8302fa
5 for more information www.linear.com/lt8302 typical p er f or m ance c harac t eris t ics intv cc voltage vs v in intv cc uvlo threshold (r fb -v in ) voltage r ref regulation voltage r ref line regulation tc pin voltage en/uvlo enable threshold en/uvlo hysteresis current intv cc voltage vs temperature t a = 25c, unless otherwise noted. temperature (c) ?50 v en/uvlo (v) 1.220 1.230 150 8302 g10 1.210 1.200 0 50 100 ?25 25 75 125 1.240 1.215 1.225 1.205 1.235 rising falling temperature (c) ?50 i hyst (a) 3 4 5 25 75 150 8302 g11 2 1 0 ?25 0 50 100 125 temperature (c) ?50 2.80 v intvcc (v) 2.85 2.90 2.95 3.00 0 50 100 150 8302 g12 3.05 3.10 ?25 25 75 125 i intvcc = 0ma i intvcc = 10ma v in (v) 5 v intvcc (v) 2.95 3.00 3.05 35 40 20 25 30 8302 g13 2.90 2.85 10 15 45 2.80 3.10 i intvcc = 0ma i intvcc = 10ma temperature (c) ?50 2.2 v intvcc (v) 2.3 2.4 2.5 2.6 0 50 100 150 8302 g14 2.7 2.8 ?25 25 75 125 falling rising temperature (c) ?50 voltage (mv) 0 20 150 8302 g15 ?20 ?40 0 50 100 ?25 25 75 125 40 ?10 10 ?30 30 i rfb = 125a i rfb = 100a i rfb = 75a temperature (c) ?50 0.990 v rref (v) 0.992 0.996 0.998 1.000 1.010 1.004 0 50 75 8302 g16 0.994 1.006 1.008 1.002 ?25 25 100 125 150 v in (v) 0 v rref (v) 1.002 1.006 1.010 40 8302 g17 0.998 0.994 1.000 1.004 1.008 0.996 0.992 0.990 10 20 30 50 temperature (c) ?50 v tc (v) 1.1 1.3 150 8302 g18 0.9 0.7 0 50 100 ?25 25 75 125 1.5 1.0 1.2 0.8 1.4 lt 8302 8302fa
6 for more information www.linear.com/lt8302 minimum switching frequency minimum switch-on time minimum switch-off time r ds(on) switch current limit maximum switching frequency typical p er f or m ance c harac t eris t ics t a = 25c, unless otherwise noted. temperature (c) ?50 resistance (m) 120 160 200 25 75 150 8302 g19 80 40 0 ?25 0 50 100 125 temperature (c) ?50 i sw (a) 3 4 5 25 75 150 8302 g20 2 1 0 ?25 0 50 100 125 maximum current limit minimum current limit temperature (c) ?50 frequency (khz) 300 400 500 25 75 150 8302 g21 200 100 0 ?25 0 50 100 125 temperature (c) ?50 frequency (khz) 12 16 20 25 75 150 8302 g22 8 4 0 ?25 0 50 100 125 temperature (c) ?50 0 time (ns) 100 200 300 400 ?25 0 25 50 8302 g23 75 100 125 150 temperature (c) ?50 0 time (ns) 100 200 300 400 ?25 0 25 50 8302 g24 75 100 125 150 lt 8302 8302fa
7 for more information www.linear.com/lt8302 p in func t ions en/ uvlo ( pin 1): enable/ undervoltage lockout. the en/uvlo pin is used to enable the lt8302. pull the pin below 0.3 v to shut down the lt8302. this pin has an ac- curate 1.214 v threshold and can be used to program a v in undervoltage lockout ( uvlo) threshold using a resistor divider from v in to ground. a 2.5 a current hysteresis allows the programming of v in uvlo hysteresis. if neither function is used, tie this pin directly to v in . intv cc (pin 2): internal 3 v linear regulator output. the intv cc pin is supplied from v in and powers the internal control circuitry and gate driver. do not overdrive the intv cc pin with any external supply, such as a third winding supply. locally bypass this pin to ground with a minimum 1f ceramic capacitor. v in (pin 3): input supply. the v in pin supplies current to the internal circuitry and serves as a reference voltage for the feedback circuitry connected to the r fb pin. locally bypass this pin to ground with a capacitor. gnd (pin 4, exposed pad pin 9): ground. the exposed pad provides both electrical contact to ground and good thermal contact to the printed circuit board . solder the exposed pad directly to the ground plane. sw (pin 5): drain of the internal dmos power switch. minimize trace area at this pin to reduce emi and voltage spikes. r fb (pin 6): input pin for external feedback resistor. connect a resistor from this pin to the transformer primary sw pin. the ratio of the r fb resistor to the r ref resistor, times the internal voltage reference, determines the output voltage ( plus the effect of any non-unity transformer turns ratio). minimize trace area at this pin. r ref (pin 7): input pin for external ground referred ref- erence resistor . the resistor at this pin should be in the range of 10 k, but for convenience in selecting a resistor divider ratio, the value may range from 9.09k to 11.0k. tc ( pin 8): output voltage temperature compensation. the voltage at this pin is proportional to absolute temperature (ptat ) with temperature coefficient equal to 3.35mv/k, i.e., equal to 1 v at room temperature 25 c. the tc pin voltage can be used to estimate the lt8302 junction tem - perature. connect a resistor from this pin to the r ref pin to compensate the output diode temperature coefficient. lt 8302 8302fa
8 for more information www.linear.com/lt8302 b lock diagra m ? + ? + 3 2 8 driver intv cc v in t1 n:1 a2 r sense a3 tc 8302 bd r ref r ref r en2 r en1 r tc r fb ? + g m 1.214v 1v m4 oscillator ldo boundary detector start-up, reference, control ptat voltage r m1 gnd 4, exposed pad pin 9 q s m2 v in v in c in 6 r fb 5 sw l1a l1b c out d out v out + v out ? m3 25a intv cc 1 en/uvlo c intvcc 2.5a 1:4 7 ? + a1 ? ? lt 8302 8302fa
9 for more information www.linear.com/lt8302 o pera t ion the lt8302 is a current mode switching regulator ic designed specially for the isolated flyback topology. the key problem in isolated topologies is how to communicate the output voltage information from the isolated secondary side of the transformer to the primary side for regulation. historically, opto-isolators or extra transformer windings communicate this information across the isolation bound - ary. opto -isolator circuits waste output power, and the extra components increase the cost and physical size of the power supply. opto-isolators can also cause system issues due to limited dynamic response, nonlinearity, unit - to- unit variation and aging over lifetime. circuits employing extra transformer windings also exhibit deficiencies, as using an extra winding adds to the transformers physical size and cost, and dynamic response is often mediocre. the lt8302 samples the isolated output voltage through the primary-side flyback pulse waveform. in this manner, neither opto-isolator nor extra transformer winding is re - quired for regulation. since the lt8302 operates in either boundar y conduction mode or discontinuous conduction mode, the output voltage is always sampled on the sw pin when the secondary current is zero. this method im - proves load regulation without the need of external load compensation components. the lt8302 is a simple to use micropower isolated fly - back converter housed in a thermally enhanced 8-lead so package. the output voltage is programmed with two external resistors. an optional tc resistor provides easy output diode temperature compensation. by integrating the loop compensation and soft-start inside, the part reduces the number of external components. as shown in the block diagram, many of the blocks are similar to those found in traditional switching regulators including reference, regulators, oscillator, logic, current amplifier, current comparator, driver, and power switch. the novel sections include a flyback pulse sense circuit, a sample- and-hold error amplifier, and a boundary mode detector, as well as the additional logic for boundary conduction mode, discontinuous conduction mode, and low ripple burst mode operation. quasi-resonant boundary mode operation the lt8302 features quasi- resonant boundary conduction mode operation at heavy load, where the chip turns on the primary power switch when the secondary current is zero and the sw rings to its valley. boundary conduction mode is a variable frequency, variable peak-current switching scheme. the power switch turns on and the transformer primary current increases until an internally controlled peak current limit. after the power switch turns off, the voltage on the sw pin rises to the output voltage multiplied by the primary-to-secondary transformer turns ratio plus the input voltage. when the secondary current through the output diode falls to zero, the sw pin voltage collapses and rings around v in . a boundary mode detector senses this event and turns the power switch back on at its valley. lt 8302 8302fa
10 for more information www.linear.com/lt8302 o pera t ion boundary conduction mode returns the secondary current to zero every cycle, so parasitic resistive voltage drops do not cause load regulation errors. boundary conduc - tion mode also allows the use of smaller transformers compared to continuous conduction mode and does not exhibit subharmonic oscillation. discontinuous conduction mode operation as the load gets lighter, boundary conduction mode in - creases the switching frequency and decreases the switch peak current at the same ratio. running at a higher switching frequency up to several mhz increases switching and gate charge losses. to avoid this scenario, the lt8302 has an additional internal oscillator, which clamps the maximum switching frequency to be less than 380 khz. once the switching frequency hits the internal frequency clamp, the part starts to delay the switch turn-on and operates in discontinuous conduction mode. low ripple burst mode operation unlike traditional flyback converters, the lt8302 has to turn on and off at least for a minimum amount of time and with a minimum frequency to allow accurate sampling of the output voltage. the inherent minimum switch cur - rent limit and minimum switch-off time are necessary to guarantee the correct operation of specific applications. as the load gets very light , the lt8302 starts to fold back the switching frequency while keeping the minimum switch current limit. so the load current is able to decrease while still allowing minimum switch- off time for the sample- and- hold error amplifier. meanwhile, the part switches between sleep mode and active mode, thereby reducing the effec - tive quiescent current to improve light load efficiency. in this condition, the lt8302 runs in low ripple burst mode operation. the typical 12khz minimum switching frequency determines how often the output voltage is sampled and also the minimum load requirement. lt 8302 8302fa
11 for more information www.linear.com/lt8302 a pplica t ions i n f or m a t ion output voltage the r fb and r ref resistors as depicted in the block diagram are external resistors used to program the output voltage. the lt8302 operates similar to traditional current mode switchers, except in the use of a unique flyback pulse sense circuit and a sample-and-hold error amplifier, which sample and therefore regulate the isolated output voltage from the flyback pulse. operation is as follows: when the power switch m1 turns off, the sw pin voltage rises above the v in supply. the amplitude of the flyback pulse, i.e., the difference between the sw pin voltage and v in supply, is given as: v flbk = (v out + v f + i sec ? esr) ? n ps v f = output diode forward voltage i sec = transformer secondary current esr = total impedance of secondary circuit n ps = transformer effective primary - to- secondary turns ratio the flyback voltage is then converted to a current, i rfb , by the r fb resistor and the flyback pulse sense circuit (m2 and m3). this current, i rfb , also flows through the r ref resistor to generate a ground-referred voltage. the resulting voltage feeds to the inverting input of the sample- and-hold error amplifier. since the sample-and-hold error amplifier samples the voltage when the secondary current is zero, the ( i sec ? esr) term in the v flbk equation can be assumed to be zero. the internal reference voltage, v ref , 1.00 v, feeds to the noninverting input of the sample-and-hold error ampli- fier. the relatively high gain in the overall loop causes the voltage at the r ref pin to be nearly equal to the internal reference voltage v ref . the resulting relationship between v flbk and v ref can be expressed as: v flbk r fb ? ? ? ? ? ? ? r ref = v ref or v flbk = v ref ? r fb r ref ? ? ? ? ? ? v ref = internal reference voltage 1.00v combination with the previous v flbk equation yields an equation for v out , in terms of the r fb and r ref resistors, transformer turns ratio, and diode forward voltage: v out = v ref ? r fb r ref ? ? ? ? ? ? ? 1 n ps ? ? ? ? ? ? ? v f output temperature compensation the first term in the v out equation does not have tempera- ture dependence , but the output diode forward voltage, v f , has a significant negative temperature coefficient (C1mv/c to C2 mv/c). such a negative temperature coefficient pro - duces approximately 200 mv to 300 mv voltage variation on the output voltage across temperature. for higher voltage outputs, such as 12 v and 24 v, the output diode temperature coefficient has a negligible ef - fect on the output voltage regulation. for lower voltage outputs, such as 3.3 v and 5 v, however, the output diode temperature coefficient does count for an extra 2% to 5% output voltage regulation. the lt8302 junction temperature usually tracks the output diode junction temperature to the first order. to compensate the negative temperature coefficient of the output diode, a resistor, r tc , connected between the tc and r ref pins generates a proportional-to-absolute-temperature (ptat ) current. the ptat current is zero at 25 c, flows into the r ref pin at hot temperature, and flows out of the r ref pin at cold temperature. with the r tc resistor in place, the output voltage equation is revised as follows: v out = v ref ? r fb r ref ? 1 n ps ? v f to ( ) ? v tc / t ( ) ? t ?to ( ) ? r fb r tc ? 1 n ps ? v f / t ( ) ? t?to ( ) to = room temperature 25 c v f / t ( ) = output diode forward voltage temperature coefficient v tc / t ( ) = 3.35mv/ c lt 8302 8302fa
12 for more information www.linear.com/lt8302 a pplica t ions i n f or m a t ion to cancel the output diode temperature coefficient, the following two equations should be satisfied: v out = v ref ? r fb r ref ? 1 n ps ? v f to ( ) v tc / t ( ) ? r fb r tc ? 1 n ps = ? v f / t ( ) selecting actual r ref , r fb , r tc resistor values the lt8302 uses a unique sampling scheme to regulate the isolated output voltage. due to the sampling nature, the scheme contains repeatable delays and error sources, which will affect the output voltage and force a re- evaluation of the r fb and r tc resistor values. therefore, a simple 2-step sequential process is recommended for selecting resistor values. rearrangement of the expression for v out in the previous sections yields the starting value for r fb : r fb = r ref ? n ps ? v out + v f to ( ) ( ) v ref v out = output voltage v f (to) = output diode forward voltage at 25c = ~0.3v n ps = transformer effective primary - to- secondary turns ratio the equation shows that the r fb resistor value is indepen- dent of the r tc resistor value. any r tc resistor connected between the tc and r ref pins has no effect on the output voltage setting at 25 c because the tc pin voltage is equal to the r ref regulation voltage at 25c. the r ref resistor value should be approximately 10k because the lt8302 is trimmed and specified using this value. if the r ref resistor value varies considerably from 10k, additional errors will result. however, a variation in r ref up to 10% is acceptable. this yields a bit of freedom in selecting standard 1% resistor values to yield nominal r fb /r ref ratios. first, build and power up the application with the starting r ref , r fb values (no r tc resistor yet) and other compo- nents connected , and measure the regulated output volt- age, v out(meas) . the new r fb value can be adjusted to: r fb(new) = v out v out(meas) ? r fb second, with a new r fb resistor value selected, the output diode temperature coefficient in the application can be tested to determine the r tc value. still without the r tc resistor, the v out should be measured over temperature at a desired target output load. it is very important for this evaluation that uniform temperature be applied to both the output diode and the lt8302. if freeze spray or a heat gun is used, there can be a significant mismatch in temperature between the two devices that causes sig - nificant error. attempting to extrapolate the data from a diode data sheet is another option if there is no method to apply uniform heating or cooling such as an oven. with at least two data points spreading across the operating temperature range, the output diode temperature coef - ficient can be determined by: ? v f / t ( ) = v out t1 ( ) ? v out t2 ( ) t1? t2 using the measured output diode temperature coefficient, an exact r tc value can be selected with the following equation: r tc = v tc / t ( ) ? v f / t ( ) ? r fb n ps ? ? ? ? ? ? once the r ref , r fb , and r tc values are selected, the regula - tion accuracy from board to board for a given application will be very consistent, typically under 5% when includ- ing device variation of all the components in the system (assuming resistor tolerances and transformer windings matching within 1%). however, if the transformer or the output diode is changed, or the layout is dramatically altered, there may be some change in v out . lt 8302 8302fa
13 for more information www.linear.com/lt8302 a pplica t ions i n f or m a t ion output power a flyback converter has a complicated relationship between the input and output currents compared to a buck or a boost converter. a boost converter has a relatively constant maximum input current regardless of input voltage and a buck converter has a relatively constant maximum output current regardless of input voltage. this is due to the continuous non-switching behavior of the two currents. a flyback converter has both discontinuous input and output currents which make it similar to a nonisolated buck-boost converter. the duty cycle will affect the input and output currents, making it hard to predict output power. in ad - dition, the winding ratio can be changed to multiply the output current at the expense of a higher switch voltage. the graphs in figures 1 to 4 show the typical maximum output power possible for the output voltages 3.3v, 5v, 12v, and 24 v. the maximum output power curve is the calculated output power if the switch voltage is 50 v dur - ing the switch-off time . 15 v of margin is left for leakage inductance voltage spike. to achieve this power level at a given input, a winding ratio value must be calculated to stress the switch to 50 v, resulting in some odd ratio values. the curves below the maximum output power curve are examples of common winding ratio values and the amount of output power at given input voltages. one design example would be a 5 v output converter with a minimum input voltage of 8 v and a maximum input volt - age of 32 v. a three-to-one winding ratio fits this design example perfectly and outputs equal to 15.3 w at 32 v but lowers to 7.7w at 8v. figure 1. output power for 3.3v output figure 2. output power for 5v output figure 3. output power for 12v output figure 4. output power for 24v output input voltage (v) 0 output power (w) 10 15 40 8302 f02 5 0 10 20 30 maximum output power 20 n = 3:1 n = 1:1 n = 4:1 n = 2:1 input voltage (v) 0 output power (w) 10 15 40 8302 f03 5 0 10 20 30 n = 1:1 maximum output power 20 n = 3:2 n = 1:2 n = 2:1 input voltage (v) 0 output power (w) 10 15 40 8302 f04 5 0 10 20 30 n = 1:2 maximum output power 20 n = 2:3 n = 1:3 n = 1:1 input voltage (v) 0 output power (w) 10 15 40 8302 f01 5 0 10 20 30 n = 6:1 maximum output power 20 n = 4:1 n = 2:1 n = 3:1 lt 8302 8302fa
14 for more information www.linear.com/lt8302 a pplica t ions i n f or m a t ion the equations below calculate output power: p out = ? v in ? d ? i sw(max) ? 0.5 = efficiency = ~85% d = duty cycle = v out + v f ( ) ? n ps v out + v f ( ) ? n ps + v in i sw(max) = maximum switch current limit = 3.6a (min) primary inductance requirement the lt8302 obtains output voltage information from the reflected output voltage on the sw pin. the conduction of secondary current reflects the output voltage on the primary sw pin. the sample - and - hold error amplifier needs a minimum 350 ns to settle and sample the reflected output voltage. in order to ensure proper sampling, the second - ary winding needs to conduct current for a minimum of 350ns. the following equation gives the minimum value for primary-side magnetizing inductance: l pri t off(min) ? n ps ? v out + v f ( ) i sw(min) t off(min) = minimum switch-off time = 350ns ( typ ) i sw(min) = minimum switch current limit = 0.87a ( typ ) in addition to the primary inductance requirement for the minimum switch-off time, the lt8302 has minimum switch-on time that prevents the chip from turning on the power switch shorter than approximately 160 ns. this minimum switch- on time is mainly for leading- edge blank - ing the initial switch turn-on current spike. if the inductor current exceeds the desired current limit during that time, oscillation may occur at the output as the current control loop will lose its ability to regulate. therefore, the following equation relating to maximum input voltage must also be followed in selecting primary - side magnetizing inductance: l pri t on(min) ? v in(max) i sw(min) t on(min) = minimum switch-on time = 160ns ( typ ) in general, choose a transformer with its primary mag- netizing inductance about 40% to 60% larger than the minimum values calculated above. a transformer with much larger inductance will have a bigger physical size and may cause instability at light load. selecting a transformer transformer specification and design is perhaps the most critical part of successfully applying the lt8302. in addition to the usual list of guidelines dealing with high frequency isolated power supply transformer design, the following information should be carefully considered. linear technology has worked with several leading mag - netic component manufacturers to produce pre-designed flyback transformers for use with the lt8302. table 1 shows the details of these transformers. table 1. predesigned transformersCtypical specifications transformer part number dimensions (w l h) (mm) l pri (h) l lkg (h) n p :n s r pri (m) r sec (m) vendor target application v in (v) v out (v) i out (a) 750311625 17.75 13.46 12.70 9 0.35 4:1 43 6 wrth elektronik 8 to 32 3.3 2.1 750311564 17.75 13.46 12.70 9 0.12 3:1 36 7 wrth elektronik 8 to 32 5 1.5 750313441 15.24 13.34 x 11.43 9 0.6 2:1 75 18 wrth elektronik 8 to 32 5 1.3 750311624 17.75 13.46 12.70 9 0.18 3:2 34 21 wrth elektronik 8 to 32 8 0.9 750313443 15.24 13.34 11.43 9 0.3 1:1:1 85 100 wrth elektronik 8 to 36 12 0.3 750313445 15.24 13.34 11.43 9 0.25 1:2 85 190 wrth elektronik 8 to 36 24 0.3 750313457 15.24 13.34 11.43 9 0.25 1:4 85 770 wrth elektronik 8 to 36 48 0.15 750313460 15.24 13.34 11.43 12 0.7 4:1 85 11 wrth elektronik 4 to 18 5 0.9 750311342 15.24 13.34 11.43 15 0.44 2:1 85 22 wrth elektronik 4 to 18 12 0.4 750313439 15.24 13.34 11.43 12 0.6 2:1 115 28 wrth elektronik 18 to 42 3.3 2.1 750313442 15.24 13.34 11.43 12 0.75 3:2 150 53 wrth elektronik 18 to 42 5 1.6 lt 8302 8302fa
15 for more information www.linear.com/lt8302 a pplica t ions i n f or m a t ion turns ratio note that when choosing an r fb /r ref resistor ratio to set output voltage, the user has relative freedom in selecting a transformer turns ratio to suit a given application. in contrast, the use of simple ratios of small integers, e.g., 3:1, 2:1, 1:1, etc., provides more freedom in settling total turns and mutual inductance. typically, choose the transformer turns ratio to maximize available output power. for low output voltages (3.3v or 5 v), a n:1 turns ratio can be used with multiple pri - mary windings relative to the secondary to maximize the transformers current gain ( and output power). however, remember that the sw pin sees a voltage that is equal to the maximum input supply voltage plus the output voltage multiplied by the turns ratio. in addition, leakage inductance will cause a voltage spike (v leakage ) on top of this reflected voltage. this total quantity needs to remain below the 65 v absolute maximum rating of the sw pin to prevent breakdown of the internal power switch. together these conditions place an upper limit on the turns ratio, n ps , for a given application. choose a turns ratio low enough to ensure n ps < 65v ? v in(max) ? v leakage v out + v f for larger n:1 values, choose a transformer with a larger physical size to deliver additional current. in addition, choose a large enough inductance value to ensure that the switch-off time is long enough to accurately sample the output voltage. for lower output power levels, choose a 1:1 or 1: n trans - former for the absolute smallest transformer size. a 1:n transformer will minimize the magnetizing inductance (and minimize size), but will also limit the available output power. a higher 1: n turns ratio makes it possible to have very high output voltages without exceeding the breakdown voltage of the internal power switch. the turns ratio is an important element in the isolated feedback scheme, and directly affects the output voltage accuracy. make sure the transformer manufacturer speci - fies turns ratio accuracy within 1%. saturation current the current in the transformer windings should not exceed its rated saturation current. energy injected once the core is saturated will not be transferred to the secondary and will instead be dissipated in the core. when designing custom transformers to be used with the lt8302, the saturation current should always be specified by the transformer manufacturers. winding resistance resistance in either the primary or secondary windings will reduce overall power efficiency. good output voltage regulation will be maintained independent of winding re- sistance due to the boundary/discontinuous conduction mode operation of the lt8302. leakage inductance and snubbers t ransformer leakage inductance on either the primary or secondary causes a voltage spike to appear on the primary after the power switch turns off. this spike is increasingly prominent at higher load currents where more stored en - ergy must be dissipated. it is very important to minimize transformer leakage inductance. when designing an application, adequate margin should be kept for the worst-case leakage voltage spikes even under overload conditions. in most cases shown in fig - ure?5, the reflected output voltage on the primary plus v in should be kept below 50 v. this leaves at least 15 v margin for the leakage spike across line and load conditions. a larger voltage margin will be required for poorly wound transformers or for excessive leakage inductance. lt 8302 8302fa
16 for more information www.linear.com/lt8302 a pplica t ions i n f or m a t ion t off > 350ns v leakage v sw <65v <50v time 8302 f05 t sp < 250ns figure 5. maximum voltages for sw pin flyback waveform in addition to the voltage spikes, the leakage inductance also causes the sw pin ringing for a while after the power switch turns off. to prevent the voltage ringing falsely trig - ger boundary mode detector, the lt8302 internally blanks the boundary mode detector for approximately 250ns. any remaining voltage ringing after 250 ns may turn the power switch back on again before the secondary current falls to zero. in this case, the lt8302 enters continuous conduction mode. so the leakage inductance spike ringing should be limited to less than 250ns. to clamp and damp the leakage voltage spikes, a (rc + dz) snubber circuit in figure?6 is recommended. the rc ( resistor-capacitor) snubber quickly damps the voltage spike ringing and provides great load regulation and emi performance. and the dz ( diode-zener) ensures well defined and consistent clamping voltage to protect sw pin from exceeding its 65 v absolute maximum rating. figure 6. (rc + dz) snubber circuit 8302 f06 r cz d l ? ? ? then add capacitance until the period of the ringing is 1.5 to 2 times longer. the change in period determines the value of the parasitic capacitance, from which the para - sitic inductance can be also determined from the initial period. once the value of the sw node capacitance and inductance is known, a series resistor can be added to the snubber capacitance to dissipate power and critically damp the ringing. the equation for deriving the optimal series resistance using the observed periods ( t period and t period(snubbed) ) and snubber capacitance (c snubber ) is: c par = c snubber t period(snubbed) t period ? ? ? ? ? ? 2 ? 1 l par = t period 2 c par ? 4 2 r snubber = l par c par note that energy absorbed by the rc snubber will be converted to heat and will not be delivered to the load. in high voltage or high current applications, the snubber needs to be sized for thermal dissipation. a 470 pf capaci - tor in series with a 39 resistor is a good starting point. for the dz snubber, proper care should be taken when choosing both the diode and the zener diode. schottky diodes are typically the best choice, but some pn diodes can be used if they turn on fast enough to limit the leak - age inductance spike. choose a diode that has a reverse- voltage rating higher than the maximum sw pin voltage. the zener diode breakdown voltage should be chosen to balance power loss and switch voltage protection. the best compromise is to choose the largest voltage breakdown with 5 v margin. use the following equation to make the proper choice: v zenner(max) 60v C v in(max) for an application with a maximum input voltage of 32 v, choose a 24 v zener diode, the v zener(max) of which is around 26 v and below the 28 v maximum. the power loss in the dz snubber determines the power rating of the zener diode. a 1.5w zener diode is typically recommended. the recommended approach for designing an rc snub- ber is to measure the period of the ringing on the sw pin when the power switch turns off without the snubber and lt 8302 8302fa
17 for more information www.linear.com/lt8302 a pplica t ions i n f or m a t ion undervoltage lockout (uvlo) a resistive divider from v in to the en/uvlo pin imple- ments under voltage lockout ( uvlo). the en/uvlo enable falling threshold is set at 1.214 v with 14 mv hysteresis. in addition, the en/uvlo pin sinks 2.5 a when the voltage on the pin is below 1.214 v. this current provides user programmable hysteresis based on the value of r1. the programmable uvlo thresholds are: v in(uvlo + ) = 1.228v ? r1 + r2 ( ) r2 + 2.5a ? r 1 v in(uvlo ? ) = 1.214v ? r1 + r2 ( ) r2 figure 7 shows the implementation of external shutdown control while still using the uvlo function. the nmos grounds the en/uvlo pin when turned on, and puts the lt8302 in shutdown with quiescent current less than 2a. lt8302 gnd en/uvlo r1 run/stop control (optional) r2 v in 8302 f07 figure 7. undervoltage lockout (uvlo) minimum load requirement the lt8302 samples the isolated output voltage from the primary-side flyback pulse waveform. the flyback pulse occurs once the primary switch turns off and the secondary winding conducts current. in order to sample the output voltage, the lt8302 has to turn on and off for a minimum amount of time and with a minimum frequency. the lt8302 delivers a minimum amount of energy even during light load conditions to ensure accurate output volt - age information . the minimum energy delivery creates a minimum load requirement, which can be approximately estimated as: i load(min) = l p 2 ri ? i sw(min) ? f min 2 ? v out l pri = transformer primary inductance i sw(min) = minimum switch current limit = 0.96a (max) f min = minimum switching frequency = 12.7 khz (max) the lt8302 typically needs less than 0.5% of its full output power as minimum load. alternatively, a zener diode with its breakdown of 10% higher than the output voltage can serve as a minimum load if pre-loading is not acceptable. for a 5 v output, use a 5.6 v zener with cathode connected to the output. output short protection when the output is heavily overloaded or shorted to ground, the reflected sw pin waveform rings longer than the in - ternal blanking time. after the 350 ns minimum switch-off time, the excessive ringing falsely triggers the boundary mode detector and turns the power switch back on again before the secondary current falls to zero. under this condition, the lt8302 runs into continuous conduction mode at 380 khz maximum switching frequency. if the sampled r ref voltage is still less than 0.6 v after 11ms (typ) soft-start timer, the lt8302 initiates a new soft-start cycle. if the sampled r ref voltage is larger than 0.6 v after 11ms, the switch current may run away and exceed the 4.5a maximum current limit. once the switch current hits 7.2a over current limit, the lt8302 also initiates a new soft-start cycle. under either condition, the new soft-start cycle throttles back both the switch current limit and switch frequency. the output short - circuit protection prevents the switch current from running away and limits the average output diode current. lt 8302 8302fa
18 for more information www.linear.com/lt8302 a pplica t ions i n f or m a t ion design example use the following design example as a guide to designing applications for the lt8302. the design example involves designing a 5 v output with a 1.5 a load current and an input range from 8v to 32v. v in( min) = 8v , v in( nom) = 12v , v in( max) = 32 v, v out = 5v, i out = 1.5a step 1: select the transformer turns ratio. n ps < 65v ? v in(max) ? v leakage v out + v f v leakage = margin for transformer leakage spike = 15v v f = output diode forward voltage = ~0.3v example: n ps < 65v ? 32v ? 15v 5v + 0.3v = 3.4 the choice of transformer turns ratio is critical in determin- ing output current capability of the converter. table ?2 shows the switch voltage stress and output current capability at different transformer turns ratio. table 2. switch voltage stress and output current capability vs turns ratio nps v sw(max) at v in(max) (v) i out(max) at v in(min) (a) duty cycle (%) 1:1 37.3 0.92 14-40 2:1 42.6 1.31 25-57 3:1 47.9 1.53 33-67 clearly, only n ps = 3 can meet the 1.5 a output current requirement, so n ps = 3 is chosen as the turns ratio in this example. step 2: determine the primary inductance. primary inductance for the transformer must be set above a minimum value to satisfy the minimum switch-off and switch-on time requirements: l pri t off(min) ? n ps ? v out + v f ( ) i sw(min) l pri t on(min) ? v in(max) i sw(min) t off(min) = 350ns t on(min) = 160ns i sw(min) = 0.87a example: l pri 350ns ? 3 ? 5v + 0.3v ( ) 0.87a = 6.4h l pri 160ns ? 32v 0.87a = 5.9h most transformers specify primary inductance with a toler - ance of 20%. with other component tolerance considered, choose a transformer with its primary inductance 40% to 60% larger than the minimum values calculated above. l pri = 9h is then chosen in this example. once the primary inductance has been determined, the maximum load switching frequency can be calculated as: f sw = 1 t on + t off = 1 l pri ? i sw v in + l pri ? i sw n ps ? v out + v f ( ) i sw = v out ? i out ? 2 ? v in ? d lt 8302 8302fa
19 for more information www.linear.com/lt8302 a pplica t ions i n f or m a t ion example: d = 5v + 0.3v ( ) ? 3 5v + 0.3v ( ) ? 3 + 12v = 0.57 i sw = 5v ? 1.5a ? 2 0.8 ? 12v ? 0.57 f sw = 277khz the transformer also needs to be rated for the correct saturation current level across line and load conditions. a saturation current rating larger than 7 a is necessary to work with the lt8302. the 750311564 from wrth is chosen as the flyback transformer. step 3: choose the output diode. tw o main criteria for choosing the output diode include forward current rating and reverse-voltage rating. the maximum load requirement is a good first-order guess at the average current requirement for the output diode. under output short-circuit condition, the output diode needs to conduct much higher current. therefore, a con - servative metric is 60% of the maximum switch current limit multiplied by the turns ratio: i diode(max) = 0.6 ? i sw(max) ? n ps example: i diode(max) = 8.1a next calculate reverse voltage requirement using maxi- mum v in : v reverse = v out + v in(max) n ps example: v reverse = 5v + 32v 3 = 15.7v the pds835l (8a, 35 v diode) from diodes inc. is chosen. step 4: choose the output capacitor. the output capacitor should be chosen to minimize the output voltage ripple while considering the increase in size and cost of a larger capacitor. use the following equation to calculate the output capacitance: c out = l pri ? i sw 2 2 ? v out ? v out example: design for output voltage ripple less than 1% of v out , i.e., 100mv. c out = 9h ? 4.5a ( ) 2 2 ? 5v ? 0.1v = 182f remember ceramic capacitors lose capacitance with ap- plied voltage . the capacitance can drop to 40% of quoted capacitance at the maximum voltage rating. so a 220f, 6.3v rating ceramic capacitor is chosen. step 5: design snubber circuit. the snubber circuit protects the power switch from leak - age inductance voltage spike. a (rc + dz) snubber is recommended for this application. a 470 pf capacitor in series with a 39 resistor is chosen as the rc snubber. the maximum zener breakdown voltage is set according to the maximum v in : v zenner(max) 60v C v in(max) example: v zenner(max) 60v C 32v = 28v a 24 v zener with a maximum of 26 v will provide optimal protection and minimize power loss. so a 24v, 1.5 w zener from central semiconductor (cmz5934b) is chosen. choose a diode that is fast and has sufficient reverse voltage breakdown: v reverse > v sw(max) v sw(max) = v in(max) + v zenner(max) example: v reverse > 60v a 100v, 1 a diode from diodes inc. ( dfls1100) is chosen. lt 8302 8302fa
20 for more information www.linear.com/lt8302 a pplica t ions i n f or m a t ion step 6: select the r ref and r fb resistors. use the following equation to calculate the starting values for r ref and r fb : r fb = r ref ? n ps ? v out + v f to ( ) ( ) v ref r ref = 10k example: r fb = 10k ? 3 ? 5v + 0.3v ( ) 1.00v = 159k for 1% standard values, a 158k resistor is chosen. step 7: adjust r fb resistor based on output voltage. build and power up the application with application com- ponents and measure the regulated output voltage. adjust r fb resistor based on the measured output voltage: r fb(new) = v out v out(measured) ? r fb example: r fb = 5v 5.14v ? 158k = 154k step 8: select r tc resistor based on output voltage temperature variation. measure output voltage in a controlled temperature envi - ronment like an oven to determine the output temperature coefficient. measure output voltage at a consistent load current and input voltage, across the operating tempera - ture range. calculate the temperature coefficient of v f : ? v f / t ( ) = v out t1 ( ) ? v out t2 ( ) t1? t2 r tc = 3.35mv/ c ? v f / t ( ) ? r fb n ps ? ? ? ? ? ? example: ? v f / t ( ) = 5.189v ? 5.041v 100 c ? 0 c ( ) = 1.48mv / c r tc = 3.35mv/ c 1.48mv/ c ? 154 3 ? ? ? ? ? ? = 115k step 9: select the en/uvlo resistors. determine the amount of hysteresis required and calculate r1 resistor value: v in(hys) = 2.5atr1 example: choose 2v of hysteresis, r1 = 806k determine the uvlo thresholds and calculate r2 resistor value: v in(uvlo + ) = 1.228v ? r1 + r2 ( ) r2 + 2.5a ? r 1 example: set v in uvlo rising threshold to 7.5v: r2 = 232k v in(uvlo + ) = 7.5v v in(unlo C ) = 5.5v step 10: ensure minimum load. the theoretical minimum load can be approximately estimated as: i load(min) = 9h ? 0.96a ( ) 2 ? 12.7khz 2 ? 5v = 10.5ma remember to check the minimum load requirement in real application. the minimum load occurs at the point where the output voltage begins to climb up as the con - verter delivers more energy than what is consumed at the output. the real minimum load for this application is about 10 ma. in this example, a 500 resistor is selected as the minimum load. lt 8302 8302fa
21 for more information www.linear.com/lt8302 typical a pplica t ions 8v to 32v in /12v out isolated flyback converter 8v to 32v in /3.3v out isolated flyback converter efficiency vs load current load and line regulation ambient temperature (c) ?50 output voltage (v) 3.30 3.40 150 8302 ta03b 3.20 3.10 0 50 100 ?25 25 75 125 3.50 3.25 3.35 3.15 3.45 r tc = 105k r tc = open v in = 12v i out = 1a output temperature variation load current (ma) 0 65 efficiency (%) 70 75 80 85 90 95 200 400 600 800 1000 8302 ta02b 1200 v in = 12v v in = 24v load current (ma) 0 11.2 output voltage (v) 11.4 11.6 11.8 12.0 12.2 12.4 200 400 600 800 1000 1200 8302 ta02c v in = 12v v in = 24v v in lt8302 sw 9h v in 8v to 32v t1 1:1 9h r fb r ref c3 470pf z1 d1 d2 c1 10f c2 1f c4 47f v out + 12v 5ma to 0.8a (v in = 12v) 5ma to 1.1a (v in = 24v) v out ? r3 39 r4 121k ? ? r6 open r2 232k r1 806k r5 10k d1: diodes dfls1100 d2: diodes pds540 t1: wurth 750313443 z1: central cmz5934b 8302 ta02a tc en/uvlo gnd intv cc v in lt8302 sw 9h v in 8v to 32v t1 4:1 0.56h r fb r ref c3 470pf z1 d1 d2 c1 10f c2 1f c4 470f v out + 3.3v 20ma to 2.7a (v in = 12v) 20ma to 3.8a (v in = 24v) v out ? r3 39 r4 140k ? ? r6 105k r2 232k r1 806k r5 10k d1: diodes dfls1100 d2: diodes pds1040l t1: wurth 750311625 z1: central cmz5934b 8302 ta03 tc en/uvlo gnd intv cc lt 8302 8302fa
22 for more information www.linear.com/lt8302 typical a pplica t ions 8v to 36v in /12v out isolated flyback converter 8v to 36v in /24v out isolated flyback converter 8v to 36v in /48v out isolated flyback converter v in lt8302 sw 9h v in 8v to 36v t1 1:1:1 9h r fb r ref c3 470pf z1 d1 d2 c1 10f c2 1f c4 22f v out1 + 12v 5ma to 0.4a (v in = 12v) 5ma to 0.55a (v in = 24v) v out2 ? r3 39 r4 121k ? ? r6 open r2 232k r1 806k r5 10k d1: diodes dfls1100 d2, d3: diodes pds360 t1: wurth 750313443 z1: central cmz5934b 8302 ta04 tc 9h d3 c5 22f v out2 + 12v 5ma to 0.4a (v in = 12v) 5ma to 0.55a (v in = 24v) v out2 ? ? en/uvlo gnd intv cc v in lt8302 sw 9h v in 8v to 36v t1 1:2 36h r fb r ref c3 470pf z1 d1 d2 c1 10f c2 1f c4 10f v out + 24v 2.5ma to 0.4a (v in = 12v) 2.5ma to 0.55a (v in = 24v) v out ? r3 39 r4 121k ? ? r6 open r2 232k r1 806k r5 10k d1: diodes dfls1100 d2: diodes sbr2u150sa t1: wurth 750313445 z1: central cmz5934b 8302 ta05 tc en/uvlo gnd intv cc v in lt8302 sw 9h v in 8v to 36v t1 1:4 144h r fb r ref c3 470pf z1 d1 d2 c1 10f c2 1f c4 2.2f v out + 48v 1.2ma to 0.2a (v in = 12v) 1.2ma to 0.27a (v in = 24v) v out ? r3 39 r4 121k ? ? r6 open r2 232k r1 806k r5 10k d1: diodes dfls1100 d2: diodes sbr1u200p1 t1: wurth 750313457 z1: central cmz5934b 8302 ta06 tc en/uvlo gnd intv cc lt 8302 8302fa
23 for more information www.linear.com/lt8302 typical a pplica t ions v in lt8302 sw 9h v in 8v to 32v t1 3:1 1h r fb r ref c3 470pf z1 d1 d2 c1 10f c2 1f c4 220f c4 10f c5 4.7f v out + 5v/1.1a (v in = 5v) 5v/2.0a (v in = 12v) 5v/2.9a (v in = 24v) v out ? r3 39 r7 5 v cc drain lt8309 gate intv cc m1 gnd r4 154k ? ? r6 open r2 232k r1 806k r8 2.1k r5 10k d1: diodes dfls1100 d2: central cmmsh1-60 m1: infineon bsc059n04ls t1: wurth 750311564 z1: central cmz5934b 8302 ta07 tc en/uvlo gnd intv cc load current (a) 0 efficiency (%) 85 90 95 1.5 2.5 8302 ta07b 80 75 0.5 1.0 2.0 3.0 70 65 8v to 32v in /5v out isolated flyback converter with lt8309 C4v to C42v in /12v out buck-boost converter C18v to C42v in /C12v out negative buck converter efficiency vs load current efficiency vs load current efficiency vs load current v in sw lt8302 l1 12h d1 z1 gnd r fb r ref en/uvlo c3 47f d1: diodes pmeg6030ep l1: wrth 744770112 z1: central cmhz5243b c2 1f v in ?4v to ?42v c1 10f r5 10k 8302 ta08a v out 12v/0.45a (v in = ?5v) 12v/0.8a (v in = ?12v) 12v/1.1a (v in = ?24v) 12v/1.3a (v in = ?42v) r4 118k intv cc load current (ma) 0 65 efficiency (%) 70 75 80 85 90 95 200 400 800600 1000 1200 1400 8302 ta08b v in = ?5v v in = ?12v v in = ?24v v in = ?42v v in lt8302 l1 12h v out ?12v 1.8a d1 z1 sw r ref en/uvlo r fb en/uvlo d1: diodes pmeg6030ep l1: wrth 744770112 z1: central cmhz5243b c2 1f v in ?18v to ?42v c1 10f c3 47f r5 10k 8302 ta09a r4 118k r2 232k r1 806k intv cc load current (ma) 0 70 efficiency (%) 75 80 85 90 95 100 500 1000 1500 2000 8302 ta09b v in = ?18v v in = ?24v v in = ?42v lt 8302 8302fa
24 for more information www.linear.com/lt8302 p ackage descrip t ion please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. .016 ? .050 (0.406 ? 1.270) .010 ? .020 (0.254 ? 0.508) 45 0? 8 typ .008 ? .010 (0.203 ? 0.254) s8e 1013 rev a .053 ? .069 (1.346 ? 1.752) .014 ? .019 (0.355 ? 0.483) typ .004 ? .010 (0.101 ? 0.254) .080 ? .098 (2.032 ? 2.489) .118 ? .138 (2.997 ? 3.505) .050 (1.270) bsc 1 2 3 4 .150 ? .157 (3.810 ? 3.988) note 3 8 7 .005 (0.13) max 6 5 .189 ? .197 (4.801 ? 5.004) note 3 .228 ? .244 (5.791 ? 6.197) .160 .005 (4.06 0.127) .118 (2.99) ref recommended solder pad layout .045 .005 (1.143 0.127) .050 (1.27) bsc inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm) s8e package 8-lead plastic soic (narrow .150 inch) exposed pad (reference ltc dwg # 05-08-1857 rev a) .089 (2.26) ref .030 .005 (0.76 0.127) typ .245 (6.22) min lt 8302 8302fa
25 for more information www.linear.com/lt8302 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number a 11/14 modified i q and i hys conditions modified l pri equation modified schematic updated related parts 3 14 23 26 lt 8302 8302fa
26 for more information www.linear.com/lt8302 ? linear technology corporation 2013 lt 1114 rev a ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/lt8302 r ela t e d p ar t s typical a pplica t ion 4v to 42v in /48v out boost converter efficiency vs load current v in sw lt8302 l1 22h d1 z1 gnd r fb r ref en/uvlo c3 10f d1: diodes pds560 l1: wrth 7443551221 z1: central cmhz5262b c2 1f v in 4v to 42v c1 10f r5 10k 8302 ta10a v out 48v/1.4a (v in = 42v) 48v/0.8a (v in = 24v) 48v/0.4a (v in = 12v) 48v/0.15a (v in = 5v) r4 464k r3 1m intv cc load current (ma) 0 70 efficiency (%) 75 80 85 90 100 250 500 8302 ta10b 1500 750 1000 1250 95 v in = 5v v in = 12v v in = 24v v in = 42v part number description comments lt8301 42v in micropower isolated flyback converter with 65v/1.2a switch low i q monolithic no-opto flyback 5-lead tsot-23 lt8300 100v in micropower isolated flyback converter with 150v/260ma switch low i q monolithic no-opto flyback, 5-lead tsot-23 lt8309 secondary-side synchronous rectifier driver 4.5v v cc 40v, fast turn-on and turn-off, 5-lead tsot-23 lt3573/lt3574 lt3575 40v isolated flyback converters monolithic no-opto flybacks with integrated 1.25a/0.65a/2.5a switch lt3511/lt3512 100v isolated flyback converters monolithic no-opto flybacks with integrated 240ma/420ma switch, msop-16(12) lt3748 100v isolated flyback controller 5v v in 100v, no-opto flyback, msop-16(12) lt3798 off-line isolated no-opto flyback controller with active pfc v in and v out limited only by external components lt3757a/lt3759 lt3758 40v/100v flyback/boost controllers universal controllers with small package and powerful gate drive lt3957/lt3958 40v/80v boost/flyback converters monolithic with integrated 5a/3.3a switch lt 8302 8302fa

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